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  rev. 1.0 october 2010 www.aosmd.com page 1 of 9 AOZ8802A ultra-low capacitance tvs diode array general description the AOZ8802A is a transient voltage suppressor array designed to protect high speed data lines such as hdmi, mddi, usb, sata, and gigabit ethernet from damaging esd events. this device incorporates four surge rated, low capacitance steering diodes and a tvs in a single package. during transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. the AOZ8802A provides a typical line to line capacitance of 0.3pf and low insertion loss up to 6ghz providing greater signal integrity maki ng it ideally suited for hdmi 1.3 applications, such as digital tvs, dvd players, set-top boxes and usb applications in mobile computing devices. the AOZ8802A comes in a rohs compliant and halogen free 1.6mm x 1.0mm x 0.55mm dfn-6 package and is rated -40c to +85c junction temperature range. features z esd protection for high-speed data lines: ? iec 61000-4-2, level 4 (esd) immunity test ? air discharge: 15kv; contact discharge: 15kv ? iec61000-4-4 (eft) 40a (5/50ns) ? iec61000-4-5 (lightning) 2.5a (8/20 s ) ? human body model (hbm) 24kv z array of surge rated diodes with internal tvs diode z small package saves board space z protects two i/o lines z low capacitance between i/o lines: 0.3pf z low clamping voltage z low operating voltage: 5.0v applications z usb, mddi, sata ports z monitors and flat panel displays z set-top box z video graphics cards z digital video interface (dvi) z notebook computers typical application figure 1. usb port AOZ8802A usb 2.0 controller d+ d- usb 2.0 port +5v d+ d- gnd vbus
AOZ8802A rev. 1.0 october 2010 www.aosmd.com page 2 of 9 ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/web/qualit y/rohs_compliant.jsp for additional information. pin configuration absolute maximum ratings exceeding the absolute maximum ratings may damage the device. notes: 1. iec 61000-4-2 discharge with c discharge = 150pf, r discharge = 330 ? . 2. human body discharge per mil-std-883, method 3015 c discharge = 100pf, r discharge = 1.5k ? . maximum operating ratings part number ambient temperature range package environmental AOZ8802Adi -40c to +85c dfn-6 green product rohs compliant 1 2 3 6 5 4 ch1 ch2 vn nc nc vn dfn-6 ( top view ) parameter rating storage temperature (t s ) -65c to +150c esd rating per iec61000-4-2, contact (1) 15kv esd rating per iec61000-4-2, air (1) 15kv esd rating per human body model (2) 24kv parameter rating junction temperature (t j ) -40c to +125c
AOZ8802A rev. 1.0 october 2010 www.aosmd.com page 3 of 9 electrical characteristics t a = 25c unless otherwise specified. specifications in bold indicate a temperature range of -40c to +85c. notes: 3. the working peak reverse voltage, v rwm , should be equal to or greater than the dc or continuous peak operating voltage level. 4. v br is measured at the pulse test current i t . 5. measurements performed using a 100ns transmission line pulse (tlp) system. symbol parameter diagram i pp maximum reverse peak pulse current v cl clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current v br breakdown voltage i f forward current v f forward voltage p pk peak power dissipation c j max. capacitance @ v r = 0 and f = 1mhz symbol parameter conditions min. typ. max. units v rwm reverse working voltage between i/o and vn (3) 5.0 v v br reverse breakdown voltage i t = 1ma, between i/o and vn (4) 6.0 v i r reverse leakage current v rwm = 5v, between i/o and vn 1 a v f diode forward voltage i f = 15ma 0.70 0.85 1 v v cl channel clamp voltage positive transients negative transient i pp = 1a, tp = 100ns, any i/o pin to ground (5) 12 -3 v v channel clamp voltage positive transients negative transient i pp = 5a, tp = 100ns, any i/o pin to ground (5) 14 -5 v v channel clamp voltage positive transients negative transient i pp = 12a, tp = 100ns, any i/o pin to ground (5) 16.5 -7 v v c j channel input capacitance v r = 0v, f = 1mhz, between i/o pins 0.30 0.35 pf v r = 0v, f = 1mhz, any i/o pin to ground 0.60 0.75 pf i i f i r i t i pp v f v cl v br v rwm v
rev. 1.0 october 2010 www.aosmd.com page 4 of 9 AOZ8802A typical performance characteristics (t period = 100ns, t r = 1ns) forward voltage vs. forward peak pulse current forward current, i pp (a) i/o ? gnd insertion loss (s21) vs. frequency frequency (mhz) s21 (db) analog crosstalk (i/o?i/o) vs. frequency frequency (mhz) insertion loss (db) 1 10 100 1000 10000 -120 -100 -80 -60 -40 -20 0 1 10 100 1000 10000 -3.00e+01 -2.50e+01 -2.00e+01 -1.50e+01 -1.00e+01 -5.00e+00 0.00e+00 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 14 forward voltage (v) (t period = 100ns, t r = 1ns) clamping voltage vs. peak pulse current peak puse current, i pp (a) 2 4 6 8 10 12 14 16 18 0 2 4 6 8 10 12 14 clamping voltage, v cl (v)
AOZ8802A rev. 1.0 october 2010 www.aosmd.com page 5 of 9 protecting usb ports from esd because electrostatic discharge (esd) is common in electronic systems, a devic e that provides protection from the undesirable effects of esd must be included in the system design. designing esd protection structures is becoming more and more challenging with the system bus and i/o operating more often at high-speed data rates. an inte grated circuit (ic) connected to external ports can be damaged by esd from the operating environment. the result of ever-shrinking ic process technology is the decrease of esd robustness because of the smaller geometry of the silicon die. since usb is a hot insertion and removal system, the usb components are subjected to esd and cable discharge event more frequently. traditional methods of esd protection include metal oxide varistors (movs), and regular cmos or bipolar clamping diodes. at higher data rates the parasitic char acteristics of those devices can cause distortion, deterioration and data loss of the signal integrity. AOZ8802A offers esd protection for high-speed data rates and for diode array chips for ease of design. the very low 0.6pf (typical) line capacitance of the AOZ8802A ensures less distortion of the 480 mbit/s usb 2.0 signal; the chips also protect against electrostatic discharge up to the stringent iec61000-4-2 level 4, 8kv (contact discharge) and 15kv standard (air discharge). they also provide ultra low matching capacitance to help improve the signal quality of differential data lines. monolithic integration provides high device reliability, and an optimized pin-out allows emi-free board layouts. figu re 2 illustrates the flow through design of the pcb layout with the AOZ8802A package design. the pinout of the AOZ8802A is designed to simply drop onto the io lines of a usb 2.0 design without having to divert the signal lines that may add more parasitic inductance. pins 1, 2 & 3 is connected to the internal tvs devices and ground. and pins 4, 5, 6 are no connects. the no connects is in place so the package can be securely soldered onto the pcb surface. figure 2. flow-through layout d+ d- ground d+ d- ground
AOZ8802A rev. 1.0 october 2010 www.aosmd.com page 6 of 9 usb 2.0 pcb layout guidelines printed circuit board layout is the key to achieving the highest level of surge immunity on power and data lines. the location of the protection devices on the pcb is the simplest and most important design rule to follow. the AOZ8802A devices should be located as close as possible to the noise source. the placement of the AOZ8802A devices should be used on all data and power lines that enter or exit the pcb at the i/o connector. in most systems, surge pulses occur on data and power lines that ente r the pcb through the i/o connector. placing the AOZ8802A devices as close as possible to the noise source ensures that a surge voltage will be clamped before the pu lse can be coupled into adjacent pcb traces. in addition, the pcb should use the shortest possible traces. a short trace length equates to low impedance, which ensures that the surge energy will be dissipated by the AOZ8802A device. long signal traces will act as antennas to receive energy from fields that are produced by the esd pulse. by keeping line lengths as short as possible, the efficiency of the line to act as an antenna for esd related fields is reduced. minimize interconnecting line lengths by placing devices with the most interconnect as close together as possible. the protection circuits should shunt the surge voltage to either the reference or chassis ground. shunting the surge voltage directly to the ic?s signal ground can cause ground bounce. the clamping performance of tvs diodes on a single ground pcb can be improved by minimizing the impedance with relatively short and wide ground traces. the pcb layout and ic package parasitic inductances can cause significant overshoot to the tvs?s clamping voltage. the inductance of the pcb can be reduced by using short trace lengths and multiple layers with separate ground and power planes. one effective method to minimize loop problems is to incorporate a ground plane in the pcb design.
AOZ8802A rev. 1.0 october 2010 www.aosmd.com page 7 of 9 package dimensions, dfn- 6 1.6mm x 1.0mm x 0.55mm note: 1. controlling dimension is millimeter. converted inch dimensions are not necessarily exact. e pin #1 dot by marking a a1 c 0.20 0.30 0.50 unit: mm 0.10 0.36 0.40 0.50 0.24 0.48 0.72 1.20 0.15 d b1 e b l 1 2 3 e pin #3 identification r 0.130 symbols a a1 b b1 c d e e l dimensions in millimeters recommended land pattern side view top view bottom view min. 0.50 0.00 0.15 1.55 0.95 0.33 nom. 0.55 0.20 0.40 0.152 ref. 1.60 1.00 0.50 bsc 0.38 max. 0.60 0.05 0.25 1.65 1.05 0.43 symbols a a1 b b1 c d e e l dimensions in inches min. 0.020 0.000 0.006 0.061 0.037 0.013 nom. 0.022 0.008 0.016 0.006 ref. 0.063 0.039 0.020 bsc 0.015 max. 0.024 0.002 0.010 0.065 0.041 0.017
rev. 1.0 october 2010 www.aosmd.com page 8 of 9 AOZ8802A tape and reel dimensions, dfn-6 1.6mm x 1.0mm x 0.55mm carrier tape reel leader / trailer & orientation tape size 8mm reel size ?178 m ?178.0 0.50 package dfn 1.6 x 1.0 (8 mm) a0 1.12 0.05 b0 1.72 0.05 k0 0.70 0.05 d0 0.55 0.05 d1 1.55 0.10 e 8.00 +0.30/-0.10 e1 1.75 0.10 e2 3.50 0.05 p0 4.00 0.10 p1 4.00 0.10 p2 2.00 0.10 t 0.25 0.05 n ?60.0 1 trailer tape 300mm min. 75 empty pockets components tape orientation in pocket leader tape 500mm min. 125 empty pockets p1 p0 w1 s k h n w m unit: mm unit: mm a0 r g v b0 d1 k0 t p2 e e2 e1 d0 feeding direction w 9.0 0.5 w1 n/a v n/a r n/a h ?13.0 +0.5/-0.2 k 10.25 0.2 s 2.40 0.10 g ?9.8
AOZ8802A rev. 1.0 october 2010 www.aosmd.com page 9 of 9 part marking bb3 AOZ8802Adi (1.6 x 1.0 dfn) assembly lot code product number code w eek code as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. this datasheet contains preliminary data; supplementary data may be published at a later date. alpha & omega semiconductor reserves the right to make changes at any time without notice. life support policy alpha & omega semiconductor products ar e not authorized for use as critical components in life support devices or systems.


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